The present invention relates to a high frequency signal processing device, and in particular to a technology effective if applied to a high frequency signal processing device that performs direct modulation using a PLL (Phase Locked Loop) circuit.
A configuration in which a calibration circuit is provided in a PLL circuit equipped with a two-point modulation system has been shown in, for example, a non-patent document 1. Described concretely, the calibration circuit is comprised of a phase frequency detector (PFD), a charge pump circuit (CP), a comparator circuit, a digital-analog converter (DAC), and a voltage controlled oscillator (VCO). In order to obtain the optimal code of the digital-analog converter (DAC) used at the modulation, the calibration circuit compares an oscillation frequency of the voltage controlled oscillator VCO with a reference frequency and searches for the optimal code while comparing an integral value at the capacity of a charge pump current at that time with a reference voltage.
[Non-Patent Document 1]
    Rui Yu et al, WIPRO Techno Center, Singapore (WTCS), “A 5.5 mA 2.4-GHz Two-Point Modulation Zigbee Transmitter with Modulation Gain Calibration, “IEEE CICC, September 2009, pp. 375-378.